The present invention relates to a semiconductor device, and can be preferably used for, for example, a semiconductor device including a power transistor.
Japanese Unexamined Patent Application Publication No. 2015-32600 describes a semiconductor device in which a plurality of transistor units each having a plurality of transistors is arranged while being aligned in a first direction. A gate electrode of each of the transistors is coupled to a gate bus line extending in the longitudinal direction of the transistor units, and further the gate bus line is drawn from an end of the transistor units to be coupled to a gate plate.